CG635 Stanford Research

Synthesized clock generator :

• 0.001Hz to 2.05GHz,
• Low jitter (<1 ps rms),
• Rise and fall time 80 ps,
• 10 MHz input and 10 MHz output,
• CMOS, PECL, ECL, LVDS and RS-485 outputs,
• PRBS eye chart test optional,
• Optional rubidium time base reference,
• Programmable GP-IB and RS-232 interfaces.

Clock generators options :

CG640 CMOS (+5 VDC) to 50 MHz
CG641 CMOS (+3.3 Vdc) to 250 MHz
CG642 CMOS (+2.5 VDC) to 250 MHz
CG643 PECL (+5 Vdc) to 1500 MHz
CG644 PECL (+3.3 Vdc) to 1500 MHz
CG645 PECL (+2.5 Vdc) to 1500 MHz
CG646 RF (+7 dBm) to 1500 MHz
CG647 CML/NIM to 1500 MHz
CG648 ECL to 1500 MHz
CG649 LVDS to 2050MHz

Please contact us for the price.